A 2005 review of FPGA arithmetic (abstract only)
Stéphane Simard, Rachid Beguenane, Éric Larouche, Luc Morin · 2005
This article is a concise literature review of the actual state of the art in arithmetic for field-programmable gate arrays (FPGAs), including studies, implementation techniques, operators, and structures, in various area-time tradeoffs. It covers the integer operations of addition/subtraction, multiplication, squaring, division, and square root, in parallel, and in both serial modes (least-significant digit first, and online). Many people, including researchers in the field of computer arithmetic, parallel computing, digital signal and image processing, system-on-a-programmable chip (SoPC) designers, and other people with a need to implement special purpose arithmetic circuits on FPGAs, might find such a review useful, either as an introduction to the topic, as a knowledge update, or for reference.