Efficient design and FPGA implementation of ECPBSG algorithm for a secure communication applications
Mamidi Nagaraju, M. Srinu, B. Satish Kumar · 2014
The main aim of this paper is to design hardware efficient secure communication system. To design a secure communication system of low hardware complexity, one method is to avoid redundancy in cryptography primitives. The method used for encryption can be either a stream cipher or block cipher. But the hardware complexity of a stream cipher is much less than that of a block ciphers. Hence in a secure communication system of low hardware complexity, stream cipher is a suitable method in order to reduce redundant hardware for the implementation of some other cryptographic service in time sharing way in the system. The key exchange and encryption are two sequential operations and a popular standard used for key exchange is Elliptic Curve (EC) based method. Most critical step in the design of stream cipher is the design of a Cryptographically Strong Pseudorandom Bit Sequence Generator (CSPBSG). This PBSG is implemented based on Elliptic Curve (EC). The main complex hardware block in Elliptic Curve Pseudorandom Bit Sequence Generator (ECPBSG) is EC point multiplication block. The computational complexity of the EC point multiplication is reduced by using normal basis representation for elements of GF (2m). The GF multiplier structure used in implementation of EC point multiplication is chosen such that the overall hardware complexity is low. It is possible to design secure stream ciphers based on EC point multiplication. Hence this paper completely concentrates on hardware efficiency, in the implementation of secure communication system.