Hardware acceleration of graphics and imaging algorithms using FPGAs
Pavel Zemčík · 2002
Computer graphics algorithms and algorithms used in image processing are generally computationally expensive. This fact is the reason why people struggle to accelerate such algorithms using any reasonable means. The traditional sources of speedup are faster processors, parallelism, or dedicated hardware. Development in digital circuit technology, especially rapid development of Field Programmable Gate Arrays (FPGA), offers alternative way to acceleration. Current FPGA chips are capable of running graphics algorithms at the speed comparable to dedicated graphics chips. At the same time they are configurable not only using schematics diagram but also through high-level programming languages, e.g. VHDL. The contribution addresses these issues, general development in the area, and shows examples of hardware platforms and algorithms that can be implemented on such platforms.