Comments on "the case for the reduced instruction set computer," by Patterson and Ditzel
Douglas W. Clark, William D. Strecker · ACM SIGARCH Computer Architecture News · 1980
Patterson and Ditzel's paper [3] argues that a Reduced Instruction Set Computer (RISC) can be as cost-effective as a Complex Instruction Set Computer (CISC). In this note we suggest that several of their points are misleading, and present some evidence on the other side of the argument. We rely heavily, as did they, on the VAX-iI architecture [5] for examples. The superiority of a RISC over a corresponding CISC will be very difficult to prove. Casual evaluation of cost and performance will not be sufficient unless the differences between a CISC and a RISC are extreme, which is unlikely. Paper designs will not be enough. A careful comparison between a RISC and a CISC would seem to us to require a complete design of the hardware and microcode for both, construction or simulation of the processors, the writing of compilers and possibly an operating system, and performance measurement across a variety of applications.