A Novel Delayed Flip-Flop Circuit Using Resonant Tunneling Logic Gates
K. Maezawa, Hideaki Matsuzaki, T. Akeyoshi, Jiro Ōsaka, Masafumi Yamamoto, Taiichi Otsuji · Japanese Journal of Applied Physics · 1998
A novel delayed flip-flop circuit using monostable-bistable transition logic elements (MOBILEs) was proposed, and was fabricated using resonant-tunneling-diode/high-electron-mobility-transistor integration technology on an InP substrate. Error free operations at up to 12.5 Gb/s were demonstrated at room temperature.