Hybrid Approach to Faster Functional Verification with Full Visibility
Chin-Lung Chuang, Wei-Hsiang Cheng, Dong-Jung Lu, Chien‐Nan Jimmy Liu · IEEE Design & Test of Computers · 2007
For functional verification, software simulation provides full controllability and observability, whereas hardware emulation offers speed. This article describes a new platform that leverages the advantages of both. This platform implements an efficient scheme to record the internal behavior of an FPGA emulator and replay the relevant segment of a simulation in a software environment for debugging. Experimental results show an order-of-magnitude savings in debugging time compared to a software-only simulation approach.