Strip mining on SIMD architectures
Michael Weiß · 1991
A compiler for vector processors must strip mine statements to fit the vector register length.The same compiler technology can be applied to SIMD machines, removing the need for a virtual processor mechanism and offering significant advantages over that approach.The different memory organizations of SIMD and vector machines give rise to strip mining differences.SIMD interprocessor communication must be stripped.Array allocation gives SIMD strip mining a global aspect.SIMD loads and stores maybe uniform or ragged.These all contribute to the complexity of the SIMD strip mining problem, and provide opportunities for a compiler to make use of its wider view of the code.