Vertical and horizontal location design of program voltage generator for 3D-integrated ReRAM/NAND flash hybrid SSD
Tomoya Ishii, Koh Johguchi, Ken Takeuchi · 2014
This paper describes the vertical and horizontal packaging method for Resistive RAM (ReRAM)/NAND flash hybrid SSD. The parasitic effects of vertical and horizontal connections for 3D-hybrid SSD are investigated. The result shows 128 NAND flash memory chips can be stacked considering with VPGMand VPASS. In addition, only 4-chip is allowed between ReRAM and the boost converter due to TSV's parasitic resistance. Also, the length of the horizontal on-interposer wire must be kept less than 3 mm.