A High-Speed Digital Divider
George R. Davis, T.M. King · IEEE Transactions on Instrumentation and Measurement · 1983
This paper describes an efficient method for generating the quotient of two binary numbers at speeds comparable to existing multiplier chips. A digital divider is designed using the BEST LINE segmentation approximation. The reciprocal curve is subdivided into small sections, and a least squares straight line approximation is used to recreate each section. An analysis is presented to determine the segmentation granularity and the binary word length of constants needed to closely approximate the curve. A compromise design based on statistical performance as well as the complexity of the hardware requirements are evaluated.