A multi-path fused add-subtract unit for Digital Signal Processing
Yao Tao, Gao Deyuan, Fan Xiaoya · 2012
The task of computing both the summation and difference of a pair of Floating-Point (FP) data is often needed in some Digital Signal Processing (DSP) algorithms and other applications. A basic fused add-subtract unit (FAS) is introduced [1] to perform simultaneously both addition and subtraction operation for a couple of operands and has less hardware overhead than the general approach using two FP adders. In this paper, a novel multi-path FAS unit is presented to accelerate the basic FAS architecture. The implementation results in FP single precision data format show that the multi-path FAS is 48.7% faster and 16.9% smaller than the basic FAS unit.