HVD-TLS: A Novel Framework of Thread Level Speculation
Fan Xu, Li Shen, Wang Zhiying · 2012
The advent of multicore platform brings a great opportunity to speedup sequential program via thread level parallelism. In this paper we have proposed a novel Thread Level Speculation (TLS) framework HVD-TLS. The framework uses heuristic value prediction to improve the speculation accuracy, reduces the rerolling overhead via value checking based correctness checking mechanism. The framework can partition and schedule task on different processor cores dynamically based on runtime information. We have implemented the HVD-TLS in ANSI C and tested its performance on a 4-core platform. The experiments show that the speedup is 2.2 on the average with a speculation depth equaling to 3.