A language for the simulation of systolic architectures
Rami Melhem · ACM SIGARCH Computer Architecture News · 1985
The main objective of this paper is to provide a methodology for the simulation of systolic architectures by applying a model that was previously suggested for the verification of systolic networks.This methodology is meant to be used for the computational assessment of such networks in the cases when formal verification is difficult.A simple language is presented to express a system of sequence equations that models the operation of the network.Then a syntax directed interpreter is developed to solve this system for specific forms of the inputs and produce the corresponding outputs.A systolic Cholesky decomposition network is introduced and used to illustrate the simulation technique.