Design and FPGA implementation of digital pulse compression for chirp radar based on CORDIC
Zhisheng Yan, Biyang Wen, Caijun Wang, Chong Zhang · IEICE Electronics Express · 2009
The paper presents a full digitized approach for the pulse compression implementation in chirp radars. The emphasis is to cancel the quadratic phase term of the echo using a coordinate rotation digital computer (CORDIC). This approach has been implemented on a field programmable gates array (FPGA) and the compressed output peak is 100dB larger than the noise.