?MOS cellular-automaton circuit for picture thinning and shrinking
Masayuki Ikebe, Koji Kameishi, Yoshihito Amemiya · Electrical Engineering in Japan · 1999
In this study we propose a design for an LSI circuit that implements a cellular automaton. The cellular automaton is a parallel and distributed architecture device suitable for high-speed image processing. To develop a cellular automaton LSI circuit, it is necessary to design small-size unit cell circuits that can operate according to cell–cell interaction rules. We propose to use νMOSFET devices for such cell circuits. Template matching is implemented by combining multiple input νMOSFET circuits and inverters. A cell circuit was designed for image thinning and shrinking, and its operation was analyzed using a circuit simulator. It was demonstrated that high speed operation (up to 100 MHz clock frequency) can be obtained. © 1999 Scripta Technica, Electr Eng Jpn, 126(3): 41–48, 1999