A Stochastic D/A Converter Based on a Cellular Automaton Architecture
Ioannis Th. Andreadis, I. Kokolakis, Antonios C. Gasteratos, Ph. Tsalides · VLSI design · 1998
The design and VLSI implementation of a new stochastic D/A converter using the properties of Cellular Automata (CA) is presented in this paper. The converter is implemented using a Double Layer Metal (DLM), 0.7 μm, N‐well, CMOS technology process provided by the European Silicon Structures (ES2). Its maximum conversion rate is 6 kHz and it is intended to be used in low‐cost applications. Additionally, the proposed approach integrates into digital techniques more easily than other popular building D/A techniques.