Fast feature-matching algorithm of motion compensation for hierarchical video CODEC
Xiaobing Lee · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 1992
The objective of this investigation is to develop a fast block matching scheme which uses Feature Matching to estimate the Motion Displacement (Motion Vector) of the inter- frame/field blocks in MPEG, ATM, or HDTV video sequences. We study two basic feature models, Sign Truncated Feature (STF) and Maximum Feature (MF) corresponding to the reduced-mean and wavelet hierarchical CODEC structures. The kernel operator is in 2 X 2 pixels and produces a Feature Vector FV (mean, model_pattern). 16 X 16 macro_block of pixels can be iteratively represented as three layered feature vector structures. In the higher resolution layers, the model_pattern alone is sufficient to describe the pixel phase correlations within the block for exclusive matching decisions. Only one or four bits are needed for each 2 X 2 pixel block in the feature vector matching. The reduced data representations make it possible to implement the real-time full range search within a large search window (+/- 32 to +/- 64 pixels). This feature representation can well express the pixel correlations, edges and texture information of the tested blocks. By matching the feature correlations rather than matching the summed pixel-by-pixel intensity values between the current block and the reference block of the previous/future video frame, it is possible to significantly reduce the basis matching complexity by re-using the previous results of feature extraction computations with less data fetching requirements. In addition, half-pixel accuracy motion estimation can be achieved. The propose feature matching algorithm is suitable for pipeline and parallel processing to approach a real time VLSI implementation. It can be more than 10 times faster relative to conventional block matching techniques with the same full range search scheme.