Sigma 5 Fortran language processor for the Computer Design Language, FIT version I
Victoria Gehman Evans · 1973
The Computer Design Language (CDL) proposed by Dr. Yaohan Chu1 can be used to provide a precise description of digital computer elements and their sequential operations. This thesis presents a Fortran language processor for the CDL with complete documentation. The program has been implemented on the SIGMA 5 Computer with 32K words of core memory and a 3 megabyte random access disk. The processor has three major parts, an Executive main program, a Translator and a Simulator. The Executive program provides the communication link between the processor and the outside world, and synchronizes the operations of the Translator and Simulator. The Translator constructs the tables and Polish string needed to implement the system. The Simulator executes programs on this system.