Termination of Ada tasks in hardware
Lars Björnfot, Kristina Lundqvist, Göran Wall, Lars Asplund · 1995
A highly parallel algorithm for termination of Ada tasks is suggested.The algorithm is intended for hardware implementation in order to overcome the complexity of recursive software algorithms.High efficiency and determinism is expected to be achieved with a hardware implementation.A VHDL implementation of termination units is presented together with simulations that show that the termination condition can be.evaluated in constant time.Array (FPGA), which offers a rapid development environment with short turn-around time.