Adaptive energy-aware latency-constrained DVFS policy for MPSoC
Diego Puschini, Fabien Clermid, Pascal Benoit, Gilles Sassatelli, Lionel Torres · 2009
In this paper we propose an adaptive technique to reduce power consumption of Multiprocessor Systems-on-Chip. The method, based on Game Theory, optimizes the frequencies of local processors while fulfilling applicative real-time constraints. Contrary to other approaches, our solution is compatible with reconfigurable Systems-on-Chip. The obtained power consumption gains on a telecommunication test-case are between 10% and 25%, while the reaction time to temporal variations due to application reconfiguration is less than 25¿s.