Reconfigurable Architecture: An Approach to Design Low Power Digital Signal Processor
Preeti Khera, Ashok Kumar, Sukhwinder Singh, Sunil Semwal, Rohit B. Patel, Brahamdeo Prasad Singh · AIP conference proceedings · 2010
Programmability is an important capability that provides flexible computing devices, but is incurs significant performance and power penalties. Performance problems cannot be solved by simply increasing operating frequency while relying on technology improvements for low power. Instead, DSP architectures need to be adapted specifically for low power operation. This paper proposed an architecture that relies on dynamic reconfiguration of hardware resources to implement low‐power and programmable processors for DSP applications. This technique has shown to yield at least an order of magnitude of power reduction compared to traditional instruction‐based engines for problems in the area of wireless communication.