LSI family for MUSE decoder
Motoaki Abe, H. Kokubun, Kazuyuki Akechi, Kazuya Kobayashi, Kazuya Kobayashi, Y. Izumi, Seiichi Gohshi, Y. Ninomiya, Tetsuo Mitsuhashi, Hideki Suganami, T. Takegahara, T. Ohmura, Katsuya Yamaguchi · IEEE Transactions on Consumer Electronics · 1990
Twenty-five LSIs for the MUSE (multiple sub-Nyquist sampling encoding) decoder have been developed. The logic and memory LSIs were fabricated using CMOS technology. Both board area and power consumption of the MUSE decoder using these LSIs were reduced to 1/30 of that of prototype decoders using conventional ICs.>