An advanced design system: design capture, functional test generation, mixed level simulation and logic synthesis [VLSI]
Masaoki Sekine, Shoji Ueda, Makoto Kogure, T. Takei, M. Aihara, 栄一 矢野, K. Iwawaki, Keita Yamagishi, K. Kohno, Takeshi Kitahara, Takayuki Fukasawa · 1989
A VLSI CAD (computer-aided design) system has been enhanced by adding several tools. It consists of a mixed-level simulator, logic synthesis, layout systems, a functional test generation assistance, etc. The functional simulator, which is on a laptop PC, is for a 50 K-gate class LSI, and the mixed level simulator, which is on an EWS and a mainframe, is for above-100 K-gate VLSI. In-house designer groups have reported that the design time is cut in half using the system. A functional schematic capture provides a more friendly user interface than a logic schematic capture. A novel approach to functional test generation is also provided