Cost reduction in migrating execution modes in a Dalvik accelerator
Atushi Ohta, Daisuke Yoshizane, Hironori Nakajo · 2012
This research is on a Dalvik accelerator in which a processor executes Dalvik bytecodes directly. The overhead can be reduced by avoiding mode switching after executing the instruction which cannot be accelerated. Moreover, additional register windows which reduce the overhead in preserving and reloading registers are also proposed.