Fault tolerant techniques for reconfigurable platforms
Upasna Sharma · 2010
Reconfigurable architectures possess the flexibility of software solutions as well as the high performance typified by hardware implementations to offer an excellent platform for developing quality-driven embedded applications. Among reconfigurable platforms, the dynamically Reconfigurable Field Programmable Gate Arrays (FPGAs) are most frequently employed for developing adaptive hardware software systems, so called Systems-on-Chip (SoC). For these systems to be fielded in harsh environments such as those encountered in space, extra-terrestrial locations and regions of extreme conditions on the earth, one must adopt fault tolerant design techniques to ensure uninterrupted and reliable operation despite the occurrence of faults. Commercial Off-the-Shelf (COTS) FPGA components offer a cost effective design trajectory where the designer can choose among a rich variety of FT approaches and techniques. Even though a large body of research has delved into the problem of fault tolerant design, there is a paucity of survey that indicates their applicability to FPGA-based SoC design. This paper attempts to categorize and compare the various FT techniques and discuss how they can work together to provide a synergetic approach for fault tolerant FPGA design.