Live demonstration: A low-power high-level synthesis system
Hua-Hsin Yeh, Chun-Hua Cheng, Shih-Hsu Huang · 2014
In this live demonstration, we present a low-power high-level synthesis system that performs the simultaneous application of operation scheduling and power management. The optimization goal is to maximize the power saving under both the timing constraints and the resource constraints. Moreover, we also develop a graphical user interface for the high-level synthesis system. Therefore, it is very easy for the user of the high-level synthesis system to perform the design space exploration (i.e., the trade-off between timing and power).