Global Load Instruction Aggregation Based on Code Motion
Yasunobu Sumikawa, Munehiro Takimoto · 2012
Most modern processors have some much faster cache memories than a main memory, and therefore, it is important to effectively utilize it for the efficient execution. The cache memories work well through enhancing temporal or spatial localities in the program. Therefore, the cache efficiency can be improved by making accesses to the same array or structure continuous. We propose the new cache optimization technique improving cache efficiency based on global code motion. Our technique moves a load instruction immediately after other preceding load instructions accessing the same array or structure, and then delays it as later as possible without changing the access order. The two step code motions enable not only globally improving the cache efficiency in the entire program with any control structure, but also suppressing register pressure. We have implemented our technique in a real compiler, and evaluated it on SPEC benchmarks. The experimental results show that our technique can decrease cache misses about 94% in the best case.