A 61MHz 72K Gates 1280×720 30FPS H.264 Intra Encoder

Dewei Li, Chun-Wei Ku, Chao‐Chung Cheng, Yu-Kun Lin, Tian‐Sheuan Chang · 2007

This paper presents an HD720p 30 frames per sec H.264 intra encoder operated at 61 MHz with just 72 K gate count. We achieve the low cost and low operating frequency with the highly utilized variable pixel scheduling, and a modified three-step fast algorithm. Thus, the resulted design only needs half of operating frequency and reduces 30% of area cost compared to the previous HD720p intra encoder design.

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