VLSI design of RNS systolic arithmetic units for high speed digital signal processing applications.

Khosrow. Vojdani · Scholarship at UWindsor (University of Windsor) · 1987

Dept. of Electrical and Computer Engineering. Paper copy at Leddy Library: Theses & Major Papers - Basement, West Bldg. / Call Number: Thesis1987 .V643. Source: Masters Abstracts International, Volume: 40-07, page: . Thesis (M.A.Sc.)--University of Windsor (Canada), 1987.

Read the paper · More papers on PaperTik