Modeling Power Supply Noise in Delay Testing
Jing Wang, D.M.H. Walker, Xiang Lü, A.K. Majhi, Bram Kruseman, G. Gronthoud, Luis Elvira Villagra, P.J.A. van de Wiel, S. Eichenberger · IEEE Design & Test of Computers · 2007
Excessive power supply noise during test can cause overkill. This article discusses two models for supply noise in delay testing and their application to test compaction. The proposed noise models avoid complicated power network analysis, making them much faster than existing power noise analysis tools. can cause performance degradation and