Testability enhancement of domino CMOS logic
J.A. Pretorius, A.S. Shubat, C.A.T. Salama · Electronics Letters · 1985
A simple circuit technique to enhance the testability of domino CMOS circuits is presented. The fact that domino CMOS gates always have their outputs precharged low enables one to test for output stuck-at-one faults by a simple modification of the domino gate.