Software techniques in ADA for high-level hardware descriptions
Sumit Ghosh · IEEE Circuits and Devices Magazine · 1986
An analysis is presented of the software techniques in Ada that are related to a high-level hardware description of digital designs and a distributed simulator, and a selected few are proposed as most appropriate. The proposed techniques have been verified in RDV, an experimental rule-based design verifier at Stanford University. Centralized and distributed scheduling techniques are also presented; the latter are proposed as an approach that may constitute a distributed verifier and potentially execute faster on multiprocessor architecture. Also proposed is a new concept, dynamic multilevel simulation or zooming, that solves the problem of inefficiency associated with the conventional static multilevel simulation approaches.