Redundancy techniques for fast static RAMs
Kimmo Kokkonen, P. Sharp, Rob Albers, J.P. Dishaw, F. Louie, Richard J. Smith · 1981
Circuitry to implement redundancy for fast static RAMs will be discussed. For a 16K×1 static RAM, with 40ns typical access time, the circuitry adds 6% to die area, 3ns to access time and ∼ 3% to circuit power, while allowing substantial yield improvements.