A fault-tolerant 64K dynamic RAM
R.P. Cenker, D.G. Clemons, W.R. Huber, J. Petrizzi, F. Procyk, G.M. Trout · 1979
A 64K MOS RAM, featuring 100ns worst-case column access time, 128 refresh cycles, and pin compatibility with 16K RAMs, will be described. Polysilicon bit lines provide a high cell/column capacitance ratio, while spare memory elements improve yield.