(N, K) Concept Fault Tolerance
Thijs Krol · IEEE Transactions on Computers · 1986
This paper describes a new fault-tolerant computer architecture based on a "distributed implementation" of a symbol- error correcting code. In this, as at is called, (N, K) concept the faults are masked by this code. The (N, K) concept is described in detail for N = 4 and K = 2. It is shown that symbol-error correcting codes having additional bit-error correcting capabilities make additional memory protection by means of bit-error correcting codes superfluous and a newly designed symbol- and bit-error correcting code for the (4,2) concept is presented. In order to cope with unreliable input devices, the interactive consistency problem is redefined and an algorithm is presented which solves this problem. The practical implementation of this algorithm in the (4,2) concept is described in detail.