GRAPE-II: Graphical RApid Prototyping Environment for Digital Signal Processing Systems
Rudy Lauwereins, Marc Engels, M. Adé, Jean Peperstraete · 1994
The paper describes GRAPE-II (Graphical RApid Prototyping Environment), an advanced system level development environment for the specification, compilation, debugging, simulation and emulation of complete DSP applications. GRAPE-II fully supports the real-time emulation of synchronous multi-rate applications on heterogeneous target platforms, consisting of multiple TMS320C40 processors, DSP5600x processors, core processors and Xilinx FPGAs. Ports to the TMS320C80 and the Analog Devices 21060 are foreseen for the near future. GRAPEII also allows for the simulation and debugging of asynchronous as well as synchronous multi-rate applications on a single Unix workstation, on a Unix workstation cluster, on a Meiko Computing Surface and on a Parsytec Xplorer parallel machine. GRAPE-II is commercialised under the name Virtuoso Synchro by Intelligent Systems International. Development costs for such ASICs are high, so algorithms should be thoroughly tested and optimized before implementation...