A microprocessor controlled fast data collection and display store
Terence Cosgrove, John S. Littler, K Stewart · Journal of Physics E Scientific Instruments · 1980
A microprocessor controlled data collection storage and display interface is described. The device is organised as two parallel 4095*8-bit memories (or 1*4095*16-bit) and can accept data either from two 8-bit adcs or from a computer at a maximum rate of 2 MHz. Data in the memory can be output to an X-Y or Y-t oscilloscope or transferred to a computer.