Simulating Resistive-Bridging and Stuck-At Faults
P. Engelke, Ilia Polian, M. Renovell, Bernd Becker · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 2006
The authors present a simulator for resistive-bridging and stuck-at faults. In contrast to earlier work, it is based on electrical equations rather than table look up, thus, exposing more flexibility. For the first time, simulation of sequential circuits is dealt with; interaction of fault effects in current time frame and earlier time frames is elaborated on for different bridge resistances. Experimental results are given for resistive-bridging and stuck-at faults in combinational and sequential circuits. Different definitions of fault coverage are listed, and quantitative results with respect to all these definitions are given for the first time.