Sources of parallelism in software pipelining loops with conditional branches
Dragan Milićev, Zoran Jovanovic · ACM SIGPLAN Notices · 2000
The subject of this paper is the instruction-level parallelism and the process of software pipelining loops with conditional branches. First, preconditions for treating such loops are introduced, and some effects of existence of conditional instructions and their outcomes that are important for parallelization are analyzed These effects are emphasized and systematized .