The structure and operation of a design language compatible simulator
Memhet B. Baray, Stephen Y. H. Su, Robert L. Carberry · 1971
Logic design language provides a powerful tool for digital system specification. When coupled with automated logic design techniques the result is an extremely efficient mechanism for system realization. However, before any design process can be considered complete, the design integrity must be verified and some measure of system performance must be obtained. It is the function of the design language simulator to provide the capability for design verification and performance evaluation. This paper describes the structure and operation of a simulator compatible with the design language of Baray and Su. The overall structure of the simulator is discussed and the data base required by the simulator is specified. An algorithm is presented for extracting the data base information from the design language specification. Finally, the simulator run time environment is examined closely so as to identify the mechanisms which give rise to efficient operation in terms of both execution time and memory space requirements.