Hardware Atomicity: An Effective Abstraction for Reliable Software Speculation
Naveen Neelakantam, Craig B. Zilles, Ravi Rajwar, Suresh Srinivas, U. Srinivasan · IEEE Micro · 2008
Technology trends and shrinking power envelopes have forced microprocessor designers to focus on hardware techniques that efficiently improve single-thread performance without superlinear increases in power and silicon area. In this article, we identify hardware atomic execution - the execution of a region of code completely or not at all - as such a feature for simplifying existing and enabling new speculative compiler optimizations. Specifically, we propose that microprocessors expose atomic execution as a hardware primitive to the compiler. Doing so lets the compiler generate a speculative version of the code where infrequently executed code paths are removed.