Economic approach to fault-tolerant synchronisation
A.H. Infis, Will R. Moore · IEE Proceedings E Computers and Digital Techniques · 1988
Previous solutions to the problem of synchronising fault-tolerant multiprocessor systems require either 3t+1 processors (for t-fault- tolerance) or else multiple rounds of messages with unforgeable digital signatures. These solutions are too expensive for small microprocessor-style control systems. The paper shows that simple constraints on the physical design of the communication links permit a much more economical solution with just 2t+1 processors and one round of messages, without the need for unforgeable signatures.