A low power NoC router using the marching memory through type
Ryota Yasudo, Takahiro Kagami, Hideharu Amano, Y. Nakase, Masashi Watanebe, Tsukasa Oishi, Toru Shimizu, Tadao Nakamura · 2014
We have concluded that with a router using MMTH the power consumption is associated with the bit change rate of the data, and when NAS parallel benchmarks work on NoC, it is reduced by 42.4% on average at 2GHz compared with a traditional FIFO implementation. The performance degradation caused by the delay of the reading time can be mostly saved by the look-ahead technique in the router.