LDPC Encoder Design and FPGA Implementation in Deep Space Communication

Lei Cheng, Hongpeng Zhu, Guangxia Li, Lei Yang · Advances in intelligent systems research/Advances in Intelligent Systems Research · 2014

According to the requirements of deep space communication channel coding and referring to the standard parameters of Consultative Committee for Space Data Systems (CCSDS), a high rate LDPC code scheme set for deep space communications is adopted.[1][2]Due to the Low density parity check (LDPC) codes' excellent error performance, it's necessary for Field Programmable Gate Array(FPGA) to achieve CCSDS-LDPC coding.In this context, the serial encoding of CCSDS deep space communication standard (1536,1024) LDPC code is realized on the Xilinx company's XC5VSX100 chip.More specifically, the details of the encoding process is shown in this context.This design can be applied to other rate of LDPC codec based upon deep space communication standard which is set by CCSDS flexibly.

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