A 521-bit dual-field elliptic curve cryptographic processor with power analysis resistance
Jen-Wei Lee, Yao-Lin Chen, Chih-Yeh Tseng, Hsie-Chia Chang, Chen‐Yi Lee · 2010
Recently, several hardware implementations for elliptic curve cryptography have been proposed but few of them considered the dual-field functions, real-time requirement, hardware efficiency, and power analysis resistance as a whole. In this paper, a new unified division algorithm and a free pre-computation scheme are introduced to accelerate the GF(p)/GF(2n) elliptic curve arithmetic functions. The overall hardware is optimized by a very compact Galois field arithmetic unit with the fully pipelined technique. Moreover, a key-blinded technique with regular calculation is designed against the power analysis attacks without degrading clock speed. After fabricated in 90nm CMOS 1P9M process, our ECC processor occupied 0.55mm2can perform the scalar multiplication in 19.2ms over GF(p521) and 8.2ms over GF(2409), respectively.