AN EXPERIMENT WITH A LOGIC PROGRAM EXECUTION MODEL ON THE TRANSPUTER
Kang Zhang · International Journal of High Speed Computing · 1992
This paper discusses an experiment with a dataflow execution model for logic programs implemented on the transputer. The execution model is supported by a dataflow virtual machine, on which the execution mechanism for AND/OR-parallelism is developed. The real-time evaluation shows that small scale parallelism can be exploited from the dataflow graphs compiled from the logic programs. A conventional dataflow architecture supporting the implemented model has been emulated on a multitransputer system.