Variable increment step based reconfigurable interleaver for multimode communication application
Liang Tang, Jude Angelo Ambrose, Sri Parameswaran · 2013
The need to integrate multiple wireless communication protocols into a single low-cost flexible hardware platform is prompted by the increasing number of emerging communication protocols and applications in modern embedded systems. The interleaving, one of the key components in the communication baseband, varies in differing communication protocols. A novel reconfigurable variable increment step (VIS) based interleaver is proposed for efficient multimode communication application. The proposed reconfigurable interleaver supports both block and convolutional interleaving, costs little in area, consumes less power compared to some other programmable solutions, and is sufficiently fast to satisfy even the most demanding of Software Defined Radio (SDR) applications. The proposed method is flexible (when compared to ASICs and some reconfigurable solutions) and suitable for mobile applications in terms of area, power consumption and throughput (when compared to FPGAs, processors and some other ASIC based reconfigurable proposals).