Lock‐in time characteristics of double correlator delay lock loop
Shinichi Kishibe, Akitaka Imamura, Masashi Sato · Electronics and Communications in Japan (Part III Fundamental Electronic Science) · 2001
Abstract As a lock tracking system for the spread spectrum communication scheme, the delay lock loop (DLL) has been widely used for a long time. However, when code division multiple access (CDMA) is carried out, signals from other stations in communication at the same time exist as interference. In the DLL, the correlation output is decreased due to the steady‐state phase error, and, as a result, the bit error rate is degraded. Hence, in this paper, a double correlation DLL is proposed as a locking system that can eliminate this steady‐state phase error. A theoretical equation is derived for the time needed for locking (lock‐in time) and for the mean time from the locked state to the unlocked state due to noise (mean time to lose lock). By means of these equations, the locking characteristics of the double correlation DLL are studied and a method for setting appropriate parameters is discussed. © 2001 Scripta Technica, Electron Comm Jpn Pt 3, 85(2): 43–51, 2002