On the design of modulo 2 n -1 cubing units
Evangelos Vassalos, Dimitris Bakalis · 2013
A hardware intensive operation that is frequently employed in several arithmetic processing applications is the computation of the third power (cube) of an operand. Residue Number System can be used in such applications. In this paper we present two methods for designing modulo 2n-1 cubing units that are based on reducing the size of the partial product matrix. The first method leads to faster circuits while the second one leads to smaller circuits for medium and large values of n. We also present minimized logic functions for efficiently designing modulo 2n-1 cubing units for small wordlengths (n<6).