On the automatic integration of hardware accelerators into FPGA-based embedded systems
Christian Pilato, Andrea Cazzaniga, Gianluca Carlo Durelli, A. Otero, Donatella Sciuto, Marco Domenico Santambrogio · 2012
This paper proposes an automatic framework for the seamless integration of hardware accelerators, starting from an OpenMP-based application and an XML file describing the HW/SW partitioning. It extends a fully software architecture by generating and integrating the cores, along with the proper interfaces, and the code for scheduling and synchronization. Experimental results show that it is possible to validate different solutions only by varying the input code.