Silicon implementation of a fuzzy neuron
T. Yamakawa · IEEE Transactions on Fuzzy Systems · 1996
This paper describes a fuzzy neuron chip which is the modification of an ordinary neuron model by fuzzy logic. The algebraic product of scaler input and connective weights in synapse is replaced by a fuzzy inner product. An excitatory connection is represented by a MIN (minimum) operation and an inhibitory connection by fuzzy logic complement followed by a MIN operation. While an ordinary neuron model is established only by leaning, the fuzzy neuron can be designed and optimized by learning. The fuzzy neuron is implemented in silicon wafer by a standard BiCMOS process. The chip is applied to a handwritten character recognition system and it exhibits very high-speed recognition (less than 500 ns).